The present invention relates to a semiconductor device, and more precisely to a semiconductor device in which a decoupling capacitor is formed by supplying voltages of different levels from each other to a guard ring device.
In semiconductor device fabrication, a spin on glass (SOG) layer is widely used for flattening, or planarizing the semiconductor device surface. An SOG layer has a good flattening characteristic and a good gap-filling characteristic between patterns, however reliability of a semiconductor having an SOG layer device may be reduced due to absorbed moisture because of an SOG layer is highly absorptive. The forming a guard ring in a semiconductor device has been suggested to prevent the moisture absorption into the SOG layer. The guard ring is formed to correspond to either the circumference of the device region or a scribe line and the guard ring protects the inside of a semiconductor device from the moisture.
FIG. 1 illustrates a semiconductor device formed with a conventional guard ring.
Referring to FIG. 1, a guard ring 20 is formed at the edge of a semiconductor device region 10 and a ground voltage (VSS) pad 11 is formed within the semiconductor device region 10. The ground voltage (VSS) pad 11 and the guard ring 20 are electrically connected through a metal line 12, and the guard ring 20 is supplied with a power provided through the ground voltage (VSS) pad 11.
The guard ring 20 and the pad 11 are connected through the metal line 12 because the semiconductor device becomes electrically unstable when the guard ring 20 is in an electrically floating state.
The VSS pad 11 supplies an external ground power to the semiconductor chip. The VSS pad 11 may be formed at a left portion of the semiconductor device region 10 as shown in FIG. 1, or alternatively may be formed at a right portion of the semiconductor device region 10.
FIG. 2 is a cross-sectional view of the conventional guard ring shown in FIG. 1, which is taken along line A-A′.
As shown in FIG. 2, an active region guard ring layer 21, a gate guard ring layer 23, a bit line guard ring layer 25, a first metal guard ring layer 27, and a second metal guard ring layer 29 are sequentially stacked in the guard ring 20, and insulation layers are formed between the respective layers. Also, the guard ring layers 21, 23, 25, and 29 are electrically connected through contacts 22, 24, 26, and 28. The metal line 12 connected with the guard ring 20, as shown in FIG. 1, corresponds to lines 21a, 23a, 25a, 27a, and 29a connected with the respective layers in FIG. 2.
A first contact 22 connects the active region guard ring layer 21 and the gate guard ring layer 23. A second contact 24 connects the gate guard ring layer 23 and the bit line guard ring layer 25. A third contact 26 connects the bit line guard ring layer 25 and the first metal guard ring layer 27. A fourth contact 28 connects the first metal guard ring layer 27 and the second metal guard ring layer 29.
The layers 21, 23, 25, 27, and 29 of the guard ring 20 are respectively connected with internal lines 21a, 23a, 25a, 27a, and 29a; and the VSS pad 11 is connected to a second VSS metal line 29a of the internal lines.
With the structure described above, the VSS pad 11 supplies an internal power through the second VSS metal line 29a to the guard ring 20.
In a conventional guard ring the guard ring exists in every layer to protect each layer of the semiconductor device.
The VSS power is applied to the metal layer to prevent the electrical instability as described above.
In order to prevent the electrical instability not only in the second metal guard ring layer 29 but also in the first metal guard ring layer 27, the second metal guard ring layer 29 and the first metal guard ring layer 27, of the guard ring 20, are electrically connected using the fourth contact 28. That is, the ground voltage VSS is also applied to the first metal line 27a and thus the first metal guard ring layer 27 is maintained in a stable voltage state.
Likewise, the ground voltage VSS is also applied to the bit line guard ring layer 25, the gate guard ring layer 23, and the active region guard ring layer 21 using the third contact 26, the second contact 24, and the first contact 22 respectively and thus the guard rings 25, 23, and 21 maintain electrical stability.
However, a conventional guard ring as described above only maintains electrical stability and cannot aid other electrical characteristics.
For example, a decoupling capacitor, preferably having a large capacity, is used in semiconductor devices to remove power line noise. However, device size is increased when a large number of such decoupling capacitors are used.